作者：吴右 沙洪 任超世 Chao-shidspbuildereit正交序列解调方法电路设计usedincircuitdesigninformationhardwareimplementation电阻抗断层成像技术虚部信息解调电路results文件工具命令语言仿真复阻抗测量modelsynthesis
摘要：目的 设计一种用于电阻抗断层成像技术(EIT)测量的正交序列解调电路用以检测被测信号的模量和相位.方法 利用DSP Builder,在matlab/simulink中搭建模型文件(.mdl),并利用仿真激励验证方法与设计的正确性和合理性;再用Signal Compiler模块读取建模文件,生成VHDL文件和工具命令语言脚本,在Quartus Ⅱ中进行综合、适配、仿真和硬件实现.结果 仿真和测试结果均表明,所设计的正交序列解调电路能够有效提取被测信号的实部信息和虚部信息,在实验误差允许的范围内能很好满足EIT测量的要求.结论 基于DSP Builder的正交序列解调方法与电路设计能够给出EIT实部和虚部信息,为全信息复阻抗测量提供有力的技术支持. Abstract： Objective To design and develop a quadrature demodulation circuit for detection of ampli-tude and phase information in EIT measurement. Methods A model structure file was built in matlab/simulink using the elements in Ahera DSP Builder and verified by simulated stimulation. Then the model file was convert-ed to VHDL file via Signal Compiler, and the synthesis, adaptation, simulation and hardware implementation were accomplished. Results The simulation and testing results show that the circuit can extract the real and imagi-nary information of the measured signal and it also meets the EIT measuring requirement, with acceptable mea-sure error. Conclusion The demodulation circuit based on DSP Builder can precisely give real and imaginary information of EIT and provides technological support for full-information complex impedance measurement.
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